Deterministic approaches to stochastic computing were proposed recently to produce completely accurate results with stochastic logic. Real-valued numbers in the [0,1] interval are converted to unary or pseudo-random bit-streams and processed using the relatively prime bit-stream length, clock division, or rotation method. Fast converging deterministic methods based on low-discrepancy bit-streams were also introduced. Long latency is the main issue with all these deterministic methods. To process m n-bit precision numbers, bit-streams of 2m×n bits must be generated. In this work, we propose a context-aware bit-stream generator to improve the performance of the deterministic bit-stream processing systems. The proposed design reduces the processing time up to 86% for the cases that completely accurate results are desired. When the application can tolerate some small rates of inaccuracy orders of magnitude reduction in the latency are achievable.
CITATION STYLE
Asadi, S., & Hassan Najafi, M. (2020). Accelerating deterministic stochastic computing with context-aware bit-stream generator. In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI (pp. 157–162). Association for Computing Machinery. https://doi.org/10.1145/3386263.3406908
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