Wiring edge-disjoint layouts

Abstract

We consider the wiring or layer assignment problem for edgedisjoint layouts. The wiring problem is well understood for the case that the underlying layout graph is a square grid (see [8]). In this paper, we introduce a more general approach to this problem. For an edgedisjoint layout in the plane resp. in an arbitrary planar layout graph, we give equivalent conditions for the k-layer wirability. Based on these conditions, we obtain linear-time algorithms to wire every layout in a trihexagonal grid, respectively every layout in a tri-square-hexagon~l grid using at most five layers.