Abstract
An overview is given of the different ADCs, in which power consumption has been minimized. First flash ADCs are examined, in which interpolation and folding is used to reduce the number of comparators. Then pipeline and SAR ADCs are shortly reviewed. Oversampling ADCs are discussed in more detail. The noise shaping is carried out with Switched-capacitor, and with opamp/GmC filters. The text concludes with TDC based ADCs. © 2012 Springer Science+Business Media B.V.
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CITATION STYLE
Sansen, W. (2012). Power minimization in ADC design. In Analog Circuit Design - Low Voltage Low Power; Short Range Wireless Front-Ends; Power Management and DC-DC, AACD 2011 (pp. 3–18). Kluwer Academic Publishers. https://doi.org/10.1007/978-94-007-1926-2_1
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