Implementation of SAR Echo Simulation Algorithm on Heterogeneous Embedded Computing Platform

Abstract

The Synthetic Aperture Radar (SAR) echo simulation is to obtain the SAR original echo signal by performing reverse operation on the pre-set SAR image. The traditional platforms used to implement the simulation algorithms like central processing unit (CPU) + graphic processing unit (GPU) and digital signal processor (DSP) + field programmable gate array (FPGA) have disadvantages such as high power consumption or complicated programming. In order to make up for these shortcomings, the implementation structure of the SAR echo simulation algorithm was improved to be applicable on the heterogeneous embedded platform with the basic SAR simulation algorithms digitized and decomposed. Base on the improved structure, a mobile GPU based heterogeneous computing platform with one multiprocessor system-on-chip (MPSoC) and multiple GPUs was designed to implement SAR echo simulation algorithm. The platform can simultaneously utilize the real-time nature of register transfer level (RTL) design and the ease of programming on GPU. It can achieve relatively faster computing power at lower power consumption and has the characteristics of miniaturization and mobility.