Performance booster electrical drain SiGe nanowire TFET (EDD-SiGe-NW-TFET) with DC analysis and optimization

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Abstract

In this paper, new concept for TFET nanowire is proposed to eliminate the issues aroused in MOSFET due to continuous scaling the device dimensions. Proposed device uses the concept of electrically doping as well as physically doping. Other than that low band gap material, silicon germanium (SiGe), is used at source region and high k dielectric is used at source–channel interface to improve the performance of the proposed structure. Simulation is done using 3D TCAD ATLAS simulator, and result validates that the proposed device is suitable for low power application. Furthermore, simulation is done for the different diameters and channel lengths for optimization.

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APA

Patel, J., Suman, P., Lemtur, A., & Sharma, D. (2019). Performance booster electrical drain SiGe nanowire TFET (EDD-SiGe-NW-TFET) with DC analysis and optimization. In Smart Innovation, Systems and Technologies (Vol. 107, pp. 567–574). Springer Science and Business Media Deutschland GmbH. https://doi.org/10.1007/978-981-13-1747-7_55

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