In-situ surface mount process characterization using digital image correlation

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Abstract

Surface mount technologies (SMT) are widely used in the electronic industry to mount integrated circuit (IC) component packages onto printed circuit boards (PCB). Increasing miniaturization and form factor reduction drives the need for improved tools and techniques to better understand and quantify the fundamentals of the surface mount process A novel application of the digital image correlation (DIC) method, a non-contact, full-field optical measuring technique for quantifying displacements and strains on a surface of interest, is employed for in-situ lab-based SMT investigations to characterize solder joint collapse. A case study is presented to examine key phenomena during the SMT process illustrating the effect of package tilt on solder joint collapse as a result of asymmetric solder ball array pattern on BGA. © The Society for Experimental Mechanics, Inc. 2014.

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Walwadkar, S., Kovalchick, C., Hezeltine, W., Liang, F., & McAllister, A. (2014). In-situ surface mount process characterization using digital image correlation. In Conference Proceedings of the Society for Experimental Mechanics Series (Vol. 5, pp. 23–31). https://doi.org/10.1007/978-3-319-00780-9_3

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