Abstract
A template for reconfigurable instruction set processors is described. This template defines a design space that enables the exploration of processors potentially suitable for flexible, power and cost efficient implementations of embedded multimedia applications, such as video compression in a hand held device. The template is based on a VLIW processor with a reconfigurable instruction set. In the future this template will be used for design space exploration, compiler retargeting and automatic hardware synthesis. Several existing reconfigurable- and non-reconfigurable processors were mapped onto the template to assess its expressiveness.
Cite
CITATION STYLE
de Beeck, P. O., Barat, F., Jayapala, M., & Lauwereins, R. (2001). CRISP: A template for reconfigurable instruction set processors. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 2147, pp. 296–305). Springer Verlag. https://doi.org/10.1007/3-540-44687-7_31
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