Abstract
Moore's Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level parallelism exploited by multi/many-core processors (MCP). Therefore, it is necessary to find out how to build the MCP hardware and how to program the parallelism on such MCP. In this work, we intend to identity the key architecture mechanisms and software optimizations to guarantee high performance for multithreaded programs. To illustrate this, we customize a dense matrix multiplication algorithm on Godson-T MCP as a case study to demonstrate the efficient synergy and interaction between hardware and software. Experiments conducted on the cycle-accurate simulator show that the optimized matrix multiplication could obtain 97.1% (124.3GFLOPS) of the peak performance of Godson-T. © 2009 Springer.
Cite
CITATION STYLE
Yuan, N., Zhou, Y., Tan, G., Zhang, J., & Fan, D. (2009). High performance matrix multiplication on many cores. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 5704 LNCS, pp. 948–959). https://doi.org/10.1007/978-3-642-03869-3_87
Register to see more suggestions
Mendeley helps you to discover research relevant for your work.
