This paper is devoted to the problem of estimating the achievable degree of parallelism for a parallel algorithm with respect to a bandwidth constraint. In a compiler chain for embedded parallel microprocessors such an estimation can be used to fix an appropriate target for parallelism reduction "tools". Informally, our problem consists in task ordering and memory management for an algorithm, so as to minimize the number of memory accesses. After a brief survey of the literature, we prove the NP-hardness of this problem and introduce a polynomial special case. We then present a branch and bound procedure for the general case along with computational results interpretation demonstrating its practical relevance. © 2011 Springer-Verlag.
CITATION STYLE
Carpov, S., Carlier, J., Nace, D., & Sirdey, R. (2011). Task ordering and memory management problem for degree of parallelism estimation. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 6842 LNCS, pp. 592–603). https://doi.org/10.1007/978-3-642-22685-4_51
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