It was predicted that scale-down development of silicon microchips would reach its limit in 2012. This chapter introduces molecular logic gates in contrast to established traditional form of gates based on silicon microchips. The roadblocks arise from fundamental physical constraints as well as monetary restrictions. The scientific barriers include very thin oxide layers i.e at the four-atom-thick level resulting in inadequate insulation thereby, causing charge leakage. Moreover, silicon looses its fundamental band structure when restricted to very small sizes. The oxide thickness limit and cannot simply be overcome by technological improvements. However, this may be overcome by using a different solution than further thinning of the oxide (Schulz 1999). Molecules, due to their discrete orbital levels, possess large energy level separations at room temperature and at the nanometer-size level make them independent of broadband properties. Construction of new fabrication lines for each generation of chips is required to maintain the chip manufacturing process, by contrast, molecular construction is a bottom-up technology that uses atoms to build nanometer-sized molecules that could further self-assemble into a desired computational circuitry. The bottom-up approach gives rise to the prospect of manufacturing electronic circuits in rapid, cost-efficient and flow-through processes. These processes can be analogous to the production of photographic film, with overall enormous cost savings over traditional microchip fabrication. Moreover, molecular density is high compared to solid-state devices (Tour 2000). © Springer-Verlag Berlin Heidelberg 2006.
CITATION STYLE
Karnati, C., & Ji, H. F. (2006). Molecular logic gates. In Micromanufacturing and Nanotechnology (pp. 275–297). Springer Berlin Heidelberg. https://doi.org/10.1007/3-540-29339-6_12
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