Back-End, CMOS-Compatible Ferroelectric FinFET for Synaptic Weights

  • Falcone D
  • Halter M
  • Bégon-Lours L
  • et al.
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Abstract

Building Artificial Neural Network accelerators by implementing the vector-matrix multiplication in the analog domain relies on the development of non-volatile and tunable resistances. In this work, we describe the nanofabrication of a three-dimensional HZO—WO x Fin Ferroelectric Field Effect Transistor (FinFeFET) with back-end-of-line conditions. The metal-oxide channel (WO x ) is structured into fins and engineered such that: 1) the current-voltage characteristic is linear (Ohmic conduction) and 2) the carrier density is small enough such that the screening length is comparable to one dimension of the device. The process temperature, including the HZO crystallization, does not exceed 400°C. Resistive switching is demonstrated in FinFeFET devices with fins dimension as small as 10 nm wide and 200 nm long. Devices containing a single fin that are 10 nm wide are characterized: 5 µs long voltage pulses in the range (−5.5 and 5 V) are applied on the gate, resulting in analog and symmetric long term potentiation and depression with linearity coefficients of 1.2 and −2.5.

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Falcone, D. F., Halter, M., Bégon-Lours, L., & Offrein, B. J. (2022). Back-End, CMOS-Compatible Ferroelectric FinFET for Synaptic Weights. Frontiers in Electronic Materials, 2. https://doi.org/10.3389/femat.2022.849879

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