A low-noise current preamplifier in 120 nm CMOS technology

1Citations
Citations of this article
5Readers
Mendeley users who have this article in their library.

Abstract

In this paper we examine the impact of deep sub-micron CMOS technology on analog circuit design with a special focus on the noise performance and the ability to design low-noise preamplifiers. To point out, why CMOS technology can grow to a key technology in low-noise and high-speed applications, various amplifier stages, applied in literature, are compared. One, that fits as a current preamplifier for low-noise applications, is the current mirror. Starting from the basic current mirror, an enhanced current preamplifier is developed, that offers low-noise and high-speed operation. The suggested chip is realized in 0.12 μm CMOS technology and needs a chip area of 100 μm×280 μm. It consumes about 15 mW at a supply voltage of 1.5 V. The presented current preamplifier has a bandwidth of 750 MHz and a gain of 36 dB. The fields of application for current preamplifiers are, for instance, charge amplifiers, amplifiers for low-voltage differential signaling (LVDS) based point-to-point data links or preamplifiers for photodetectors. © Author(s) 2008.

Cite

CITATION STYLE

APA

Uhrmann, H., Gaberl, W., & Zimmermann, H. (2008). A low-noise current preamplifier in 120 nm CMOS technology. Advances in Radio Science, 6, 213–217. https://doi.org/10.5194/ars-6-213-2008

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free