Abstract
We report on the inclusion of a formal method into an industrial design process. Concretely, we suggest carrying out a verification step in railway interlocking design between programming the interlocking and testing this program. Safety still relies on testing, but the burden of guaranteeing completeness and correctness of the validation is in this way greatly reduced. We present a complete methodology for carrying out this verification step in the case of ladder logic programs and give results for real world railway interlockings. As this verification step reduces costs for testing, Invensys Rail is working to include such a verification step into their design process of solid state interlockings. © 2014 Springer International Publishing.
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CITATION STYLE
James, P., Lawrence, A., Moller, F., Roggenbach, M., Seisenberger, M., Setzer, A., … Chadwick, S. (2014). Verification of solid state interlocking programs. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 8368 LNCS, pp. 253–268). Springer Verlag. https://doi.org/10.1007/978-3-319-05032-4_19
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