Implementation and performance comparison of a four-bit ripple-carry adder using different MOS current mode logic topologies

Abstract

In this paper, we have implemented a four-bit ripple carry adder using three different MOS Current Mode logic (MCML) topologies, namely conventional MCML, triple-tail cell based MCML, and quad-cell based MCML. The ripple-carry adder has been designed using four full adder circuits that essentially comprise of Sum and Carry circuit. The design of Sum and Carry circuits based on XOR gates and multiplexers has been proposed and implemented using the three specified topologies and a performance comparison is also presented. As the circuit has multiple inputs, quad cell based MCML implementation has shown the most promising performance in terms of power consumption and output voltage v/s temperature stability. However, the output voltage is most susceptible to noise in this topology. A deeper analysis of the circuits revealed that the number of transistors used is least in the conventional MCML based implementation while the triple tail based topology has the minimum delay.