Abstract
This paper presents a new approach for converting a ternary reversible circuit implemented from a truth table into an online testable circuit. Our approach adds three extra lines to the given circuit, inserts Feynman gates and M-S gates, and replaces the ternary Toffoli gates (KP-m gates) with TKP-(m+1) gates. Our approach works with only 2×2 gates and 1×1 gates and covers a higher number of detectable faults. Preliminary work shows fault coverage of 84.89% when the approach is applied to a testable ternary half adder. © 2013 Springer-Verlag Berlin Heidelberg.
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CITATION STYLE
Nayeem, N. M., & Rice, J. E. (2013). Design of an online testable ternary circuit from the truth table. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 7581 LNCS, pp. 152–159). Springer Verlag. https://doi.org/10.1007/978-3-642-36315-3_12
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