Abstract
In this paper we introduce a vector ISA extension to facilitate sparse matrix manipulation on vector processors (VPs). First we introduce a new Block Based Compressed Storage (BBCS) format for sparse matrix representation and a Block-wise Sparse Matrix-Vector Multiplication approach. Additionally, we propose two vector instructions, Multiple Inner Product and Accumulate (MIPA) and LoaD Section (LDS), specially tuned to increase the VP performance when executing sparse matrix-vector multiplications. © Springer-Verlag Berlin Heidelberg 1999.
Cite
CITATION STYLE
Vassiliadis, S., Cotofana, S., & Stathis, P. (1999). Vector ISA extension for sparse matrix-vector multiplication. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 1685 LNCS, pp. 708–715). Springer Verlag. https://doi.org/10.1007/3-540-48311-x_100
Register to see more suggestions
Mendeley helps you to discover research relevant for your work.
