With larger process spreads, corner case models wich are used in traditional CAD, become highly PESSIMISTIC forcing designers to overdesign products, particularly in an ASIC environment. This growing degree of guardbanding erodes profits, increases time to market, and geerall will make it more difficult to maintain Moore's Law in the near future.
CITATION STYLE
Statistical Analysis and Optimization for VLSI: Timing and Power. (2005). Statistical Analysis and Optimization for VLSI: Timing and Power. Springer-Verlag. https://doi.org/10.1007/b137645
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