3D Clock Routing for Pre-bond Testability

  • Lim S
N/ACitations
Citations of this article
2Readers
Mendeley users who have this article in their library.
Get full text

Cite

CITATION STYLE

APA

Lim, S. K. (2013). 3D Clock Routing for Pre-bond Testability. In Design for High Performance, Low Power, and Reliable 3D Integrated Circuits (pp. 153–185). Springer New York. https://doi.org/10.1007/978-1-4419-9542-1_6

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free