Various generic methods for the three-dimensional (3D) integration of integrated circuits (ICs) are discussed. All these methods rely on ultra-thin chips. Wafer-to-wafer bonding, chip-to-wafer bonding, multichip-to-wafer bonding and reconfigured wafer-to-wafer bonding are described and compared. Several test chips fabricated by that use some of those concepts are briefly mentioned. Finally, specific concerns related to 3D-IC integration that use ultra-thin chips are indicated. © 2011 Springer Science+Business Media, LLC.
CITATION STYLE
Koyanagi, M. (2011). 3D-IC technology using ultra-thin chips. In Ultra-thin Chip Technology and Applications (pp. 109–123). Springer New York. https://doi.org/10.1007/978-1-4419-7276-7_11
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