This chapter introduces techniques that do not relay on high-speed ATE instruments for both the transmitter and the receiver testing that is discussed in Chapter 3 and Chapter 4, respectively. We describe the principles of the design of FPGA-based test equipment, including Bit Error Rate Tester (BERT), pseudorandom noise injection and channel emulation. Then, we provide the details of a complete standalone tester that uses relays and/or MEMS-based switching devices. The advantages and disadvantages of the state-of-the art in each such case are presented.
CITATION STYLE
Fan, Y., & Zilic, Z. (2011). Testing HSSIs with or without ATE Instruments. In Accelerating Test, Validation and Debug of High Speed Serial Interfaces (pp. 121–147). Springer Netherlands. https://doi.org/10.1007/978-90-481-9398-1_5
Mendeley helps you to discover research relevant for your work.