Design of Energy Efficient Digital Circuits

Abstract

Recent technology advances have resulted in power being the major concern for digital design. In this chapter we address how transistor sizing affects the energy and delay of digital circuits. The state of the art in circuit design methodology (Logical Effort) is examined and we identify its inadequacy for design in the energy-delay space. We explain how to explore the entire energy-delay space for a circuit and present an approach for the design and analysis in the energy-delay space which allows for energy reduction without performance penalty. Finally we present techniques for the design of energy-efficient digital circuits.