Development of high-endurance and long-retention FeFETs of Pt/CaySr1−y Bi2Ta2O9/(HfO2)x(Al2O3)1−x/Si gate stacks

Abstract

Studies of our Pt/CaySr1−yBi2Ta2O9(CSBT(y))/(HfO2)x(Al2O3)1−x(HAO (x))/Si MFIS FeFETs were reviewed which were originated from the Pt/SrBi2Ta2O9(SBT)/HAO(x = 0.75)/Si FeFET invented in 2002. Electrical properties of the fist FeFET were introduced which were 106 s-long retention, 1012 cycles-high endurance and 4 × 10−8 s-demonstrated writing speed. Stable Id–Vg curves and Id-retentions were measured up to 85 °C using p-channel FeFETs. Individual requirements to the M, F, I and IL layers as the components of MFIS were discussed using a band profile of the Pt/SBT/HAO(x = 0.75)/Si. Experimental studies for improving the HAO(x) and IL layer qualities were introduced. The composition ratio x in HAO(x) was optimized using single HAO(x) films and the MIS characters which all underwent a standard 800 °C annealing for SBT poly-crystallization. The ratio x ≧ 0.75 was found to be suitable for the I layer in the MFIS. As an ambient gas in depositing HAO(x = 0.75) by PLD, O2and N2 were compared. In the Pt/SBT/HAO(x = 0.75)/Si FeFET, the HAO worked as a material-diffusion barrier only when it was deposited in N2. Effect of increasing the ambient N2 pressure was studied using the FeFETs. The pressure should be less than 40 Pa for keeping a clear interface between the SBT and HAO. Direct nitriding Si was studied for enlarging the memory window of Pt/SBT/HAO(x = 0.75)/Si FeFET. Oxinitriding Si was also demonstrated as a modified way to decrease the subthreshold-voltage swing of the FeFET. Experimental works to use CSBT(y) instead of the SBT was also introduced. The Pt/CSBT(y = 0.1, 0.2)/HAO(x = 0.75)/ Si FeFETs showed wider pulse-memory window VplsW than the reference Pt/SBT/HAO(x = 0.75)/Si FeFET at the common measurement conditions. When (VE, VP) = (−5, 7 V) and tpls = 1 μs, the Pt/CSBT(y = 0.1, 0.2)/HAO(x = 0.75)/Si.