Compact Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model

Abstract

The charge based compact model for Drain-Extended MOS (DEMOS) transistor is presented in this work. Proposed model accurately predicts the special effects of quasi-saturation, present in high voltage MOSFETs. Modeling methodology used in this paper includes the drift resistance model based on intrinsic drain current, and low voltage BSIM-BULK model. Developed model along with the BSIM-BULK compact model can be used for the modeling of low voltage bulk MOSFETs to DEMOS transistors. Proposed model results are validated with Technology Computer-Aided Design (TCAD) DEMOS data. The model is accurately capturing the impact of drift region on DC I-V characteristics and their derivatives.