Cost modeling and analysis of TSV and contactless 3D-ICs

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Abstract

Contactless three-dimensional (3-D) interconnects have been proposed as an alternative to through-silicon via (TSV) due to its manufacturing compatibility with two-dimensional (2-D) processes. Typically, contactless 3-D circuits are thought to require considerable silicon resources compared to TSV. However, recent manufacturing options, such as extreme wafer thinning, provide new opportunities for this approach. This paper, therefore, explores these opportunities for producing 3-D systems of lower cost. The presented cost analysis and models usefully combine fabrication cost with performance requirements for inter-tier communication as a critical component of 3-D systems. Thus, benchmark circuits are simulated for a two-tier system using a commercial 65 nm technology and communicating at a data rate of 1 Gbps per link, although the model is directly applicable to any technology or design specifications. Interestingly, inductive links can be a useful alternative to TSV for specific and expected manufacturing capabilities. Furthermore, the effectiveness of different multiplexing schemes and their effect on system cost is also evaluated.

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APA

Jiang, M., Papistas, I. A., & Pavlidis, V. F. (2020). Cost modeling and analysis of TSV and contactless 3D-ICs. In Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI (pp. 519–524). Association for Computing Machinery. https://doi.org/10.1145/3386263.3406931

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