Analysis of passive frequency multiplier designs for K-band wireless communication systems

Abstract

This paper reports the passive frequency multiplier designs used to obtain a pre-determined multiplies output frequency of 20 to 26 GHz in modern communication system. The performances between the simulated lumped frequency multiplier modeling design and the Monolithic Microwave Integrated Circuit (MMIC) frequency multiplier design are going to be compared throughout this paper. Both designs are analyzed based on the results of the output power frequency obtained. The MMIC frequency multiplier fabricated using Pseudomorphic High Electron Mobility Transistor (PHEMT) technology and packaged into Quad Flat No-leads (QFN) package with Surface Mount Technology (SMT) application. The commercial MMIC surface mount package is matched to 50 Ω and fully blocked.