An efficient on-chip implementation of reconfigurable continuous time sigma delta ADC for digital beamforming applications

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Abstract

SONAR and RADAR makes use of multiple beamforming systems. A novel Onboard Digital Beamforming (DBF) system suitable for various applications is implemented with mixed signal design of Sigma Delta ADC architecture. FPGA is configured as a Reconfigurable On-chip Sigma Delta ADC and analyzed for a multichannel beamforming system with Spartan 6, Virtex 4, and Virtex 6 FPGA. With the architectural variation, major advantages can be seen in SONAR beamforming and similar array processing applications.

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Palagiri, A. H. V., Makkena, M. L., & Chantigari, K. R. (2016). An efficient on-chip implementation of reconfigurable continuous time sigma delta ADC for digital beamforming applications. In Advances in Intelligent Systems and Computing (Vol. 381, pp. 291–299). Springer Verlag. https://doi.org/10.1007/978-81-322-2526-3_31

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