Abstract
We propose a dynamically reconfigurable arithmetic block architecture for customizing embedded application processor instruction sets. Our architecture uses medium-grained arithmetic blocks and a dedicated but reconfigurable interconnection network to support a wide range of instruction-set extensions. Our experimental results demonstrate the performance of our arithmetic block compared to a general-purpose processor, and its area- and energy-efficiency compared to dedicated arithmetic circuits. © 2014 Springer International Publishing Switzerland.
Cite
CITATION STYLE
Alouani, I., Saghir, M. A. R., & Niar, S. (2014). ARABICA: A reconfigurable arithmetic block for ISA customization. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 8405 LNCS, pp. 248–253). Springer Verlag. https://doi.org/10.1007/978-3-319-05960-0_25
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