Dataflow software pipelining was proposed as a means of structuring fine-grain parallelism and has been studied mostly under an idealized dataflow architecture model with infinite resources[7]. In this paper, we address some issues of software pipelining under a realistic architecture model with finite resources. A general framework for fine-grain code scheduling in pipelined machines is developed which simultaneously addresses both time and space efficiency issues for loops typically found in general-purpose scientific computations. This scheduling method exploits fine-grain parallelism through a loop optimization technique which limitedly balances1 the program graph at compile time, while the instruction-level scheduling is done dynamically at runtime in a data-driven manner.
CITATION STYLE
Gao, G. R., Hum, H. H. J., & Wong, Y. B. (1990). An efficient scheme for fine-grain software pipelining. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 457 LNCS, pp. 709–720). Springer Verlag. https://doi.org/10.1007/3-540-53065-7_147
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