Boundary scan security enhancements for a cryptographic hardware

Abstract

Boundary scan (JTAG) is a powerful testing scheme that is widely used in nowadays circuits to maintain and verify operation of the hardware. However, JTAG is not used in cryptographic hardware since it may be used to compromise security of the implemented cryptographic algorithm. This paper analyses different solutions proposed to overcome the threat of such attacks, presents requirements that have to be satisfied in order to construct effective security solution, and presents novel proposal that improves security of the boundary scan. © 2009 Springer-Verlag Berlin Heidelberg.