Thermal mapping of power semiconductors in H-bridge circuit

Abstract

In this paper, a universal H-bridge circuit is used as a loading emulator to investigate the loss and thermal models of the power semiconductor. Based on its operation principle and modulation method, the dominating factors' (e.g., power factor, loading current, fundamental frequency, and switching frequency) impact on the thermal stress of power semiconductors is considerably evaluated. The junction temperature in terms of the mean value and its swing is verified by using Piecewise Linear Electrical Circuit Simulation (PLECS) simulation and experimental setup. It helps to allocate the loading condition in order to obtain the desired thermal stress.