Improved Scheme for Estimating the Embedded Gate Resistance to Reproduce SiC MOSFET Circuit Performance

Abstract

The intrinsic gate resistance Rg in, which is a novel resistance factor embedded in transistors, was determined for silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs). The study demonstrated that Rg\in is overestimated in the conventional measurement scheme due to the contact resistance Rsp between p-type SiC and the source electrode. Here, 6.7 mΩ · cm2 was measured for Rsp using the transfer length method (TLM), and Rgin = 9 Ω was the revised value, unlike the conventional value of 25 Ω. This improved Rg in provides better-simulated switching waveforms in a double-pulse test (DPT) with a SiC MOSFET; however, the method requires detailed knowledge of the target device. Accordingly, we developed another measurement scheme without such prerequisites. In this scheme, three types of impedance Z were measured: Z between the drain (D) and source terminal (S), and two Zs between the gate and S, with DS left open and short. From these results, Rg in was determined to be 8.8 Ω with other device parasitic parameters simultaneously.