Device characteristics of pentacene dual-gate organic thin-film transistor

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Abstract

We fabricated pentacene organic thin-film transistors (OTFTs) with a dual-gate structure, in which 300-nm-thick thermally grown Sio2 and 500-nm-thick parylene were used as a bottom-gate and a top-gate dielectric, respectively. The threshold voltage (VTH) of the dual-gate OTFT changed systematically with the application of voltage bias to the top-gate electrode. When voltage bias from -20 to 20 V was applied to the top-gate electrode, Vth changed from 9.4 to -9.3 V. The range of V th shift in the dual-gate OTFT with a thin 10 nm pentacene layer was much wider than that with a thick 500 nm pentacene layer. This shift of V th due to the body effect allows the change from an enhancement- to a depletion-mode transistor, which is beneficial for the fabrication of organic circuits. ©2007 The Japan Society of Applied Physics.

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Koo, J. B., Suh, K. S., You, I. K., & Kim, S. H. (2007). Device characteristics of pentacene dual-gate organic thin-film transistor. Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, 46(8 A), 5062–5066. https://doi.org/10.1143/JJAP.46.5062

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