Effective analysis of an iterative median filter-hardware and software perspective

Abstract

Image quality enhancement is a very predominant domain of discussion as the complexity of system increases, the software implementation becomes a key factor but it is not always reliable to use the approach for adaptable applications such as medical, military or real time purpose. In order to address such scenarios it is necessary to have a reconfigurable and an adaptable implementation. In this paper we have addressed the hardware modeling of a median filter using double iteration process. The iterative median filter is implemented on an Artix-7 FPGA.