Runtime reconfigurable routing

Abstract

This paper is concerned with practicable solutions to a dynamic circuit reconfiguration problem: how to perform rnntime routing of data between blocks of circuitry. The solutions use a 'virtual circuitry' approach based on the notion of Swappable Logic Units (SLUs). They involve a continuum of three types of routing model in which communication channels are made available using some form of extra configured logic supplied by an operating system. These models involve trade-offs between flexibility, speed and cell count; however, all stop short of any impractical attempt at arbitrary routing at mm time. The models also illustrate a blurring of traditional notions of ‘hardware’ and ‘software’, at a point where circuitry meets instruction sequences.