Reduced Representation of Power Grid Models

Abstract

We discuss the reduction of large-scale circuit equations with many terminals. Usual model order reduction (MOR) methods assume a small number of inputs and outputs. This is no longer the case, e.g., for the power supply network for the functional circuit elements on a chip. Here, the order of inputs/outputs, or terminals, is often of the same order as the number of equations. In order to apply classical MOR techniques to these power grids, it is therefore mandatory to first perform a terminal reduction. In this survey, we discuss several techniques suggested for this task, and develop an efficient numerical implementation of the extended SVD MOR approach for large-scale problems. For the latter, we suggest to use a truncated SVD computed either by the implicitly restarted Arnoldi method or the Jacobi-Davidson algorithm. We analyze this approach regarding stability, passivity, and reciprocity preservation, derive error bounds, and discuss issues arising in the numerical implementation of this method.