Neurons cultured directly over open-gate field-effect transistors result in a hybrid device, the neuron-FET. Neuron-FET amplifier circuits reported in the literature employ the neuron-FET transducer as a current-mode device in conjunction with a transimpedance amplifier. In this configuration, the transducer does not provide any signal gain, and characterization of the transducer out of the amplification circuit is required. Furthermore, the circuit requires a complex biasing scheme that must be retuned to compensate for drift. Here we present an alternative strategy based on the g m I d design approach to optimize a single-stage common-source amplifier design. The g m I d design approach facilitates in circuit characterization of the neuron-FET and provides insight into approaches to improving the transistor process design for application as a neuron-FET transducer. Simulation data for a test case demonstrates optimization of the transistor design and significant increase in gain over a current mode implementation. © 2012 Eric Basham and David Parent.
CITATION STYLE
Basham, E., & Parent, D. (2012). Design optimization of transistors used for neural recording. Active and Passive Electronic Components, 2012. https://doi.org/10.1155/2012/472306
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