We present an approach, called software prefetching, to reducing cache miss latencies. By providing a nonblocking prefetch instruction that causes data at a specified memory address to be brought into cache, the compiler can overlap the memory latency with other computation. Our simulations show that, even when generated by a very simple compiler algorithm, prefetch instructions can eliminate nearly all cache misses, while causing only modest increases in data traffic between memory and cache. © 1991, ACM. All rights reserved.
CITATION STYLE
Callahan, D., Kennedy, K., & Porterfield, A. (1991). Software prefetching. ACM SIGARCH Computer Architecture News, 19(2), 40–52. https://doi.org/10.1145/106975.106979
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