Hardware implementation of rainbow tables generation for hash function cryptanalysis

Abstract

Nowadays programmable logic structures are commonly used in cryptology. FPGA implementations of cryptographic and cryptanalytic algorithms combine advantages of an ASIC and a software, offering both great data processing speed and flexibility. In this paper, we present the design and implementation of a system for rapid rainbow tables’ generation. Rainbow tables are commonly used for cryptanalysis of hash functions. The presented approach shows that proposed method may compete with CPU-based approaches when performance is considered, as well as computational complexity, while maintaining low level of programmable structures’ logic element utilization.