Enhanced intellectual property protection for digital circuits on programmable hardware

Abstract

The use of digital marks to provide ownership (watermarking) and recipient (fingerprinting) identification for intellectual property (IP) has become widespread. However, many of these techniques require a high complexity of copy detection, are vulnerable to mark removal after revelation for ownership verification, and are susceptible to reduced mark integrity due to partial mark removal. This paper presents a method for both watermarking and fingerprinting intellectual property, in the form of designs implemented on field programmable gate arrays (FPGAs), that achieves robustness by responding to these three weaknesses. The key techniques involve using secure hash functions to generate and embed multiple small marks that are more detectable, verifiable, and secure than existing FPGA IP protection techniques.