A low drop-out voltage regulator in 0.18 μm CMOS technology

Abstract

Low Dropout regulators (LDOs) are essential devices for power supplies in almost all portable and hand-held electronic devices. The chip area of the usual LDO is still large and does not have the flexibility or adjustability of sampling resistor, output resistor and capacitorsin error amplifier and series pass element. In this study, a Low Dropout regulator (LDO) circuit architecture with Mentor Graphic simulation software in 0.18 μm CMOS process technology with adjustable sampling resistor, output resistor and capacitors in error amplifier and series pass element is proposed. The proposed regulator design has the superiority that the sampling resistor, output resistor and capacitor is adjustable or can be changed when needed in error amplifier and series pass element. Moreover, the occupied chip area obtained is only (20.43 × 14.6)μm2.