Abstract
This work revisits the recent complete addition formulas for prime order elliptic curves of Renes, Costello and Batina in light of parallelization. We introduce the first hardware implementation of the new formulas on an FPGA based on three arithmetic units performing Montgomery multiplication. Our results are competitive with current literature and show the potential of the new complete formulas in hardware design. Furthermore, we present algorithms to compute the formulas using anywhere between two and six processors, using the minimum number of field multiplications.
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Massolino, P. M. C., Renes, J., & Batina, L. (2016). Implementing complete formulas on weierstrass curves in hardware. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 10076 LNCS, pp. 89–108). Springer Verlag. https://doi.org/10.1007/978-3-319-49445-6_5
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