With power becoming a key design constraint, particularly in server machines, emerging architectures need to leverage reconfigurable techniques to provide an energy optimal system. The need for a single chip solution to fit all needs in a warehouse sized server is important for designers. This allows for simpler design, ease of programmability, and part reuse in all segments of the server. A reconfigurable design would allow a single chip to operate efficiently in all aspects of a server providing both single thread performance for tasks requiring it, and efficient parallel processing helping to reduce power consumption. In this paper we explore the possibility of a reconfigurable server part and discuss the benefits and open questions still surrounding these techniques. © 2009 Springer Berlin Heidelberg.
CITATION STYLE
Dreslinski, R. G., Fick, D., Blaauw, D., Sylvester, D., & Mudge, T. (2009). Reconfigurable multicore server processors for low power operation. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 5657 LNCS, pp. 247–254). https://doi.org/10.1007/978-3-642-03138-0_27
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