Topology-oriented design of analog circuits based on evolutionary graph generation

Abstract

This paper presents an efficient graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG), and its application to the topology-oriented design of analog circuit structures. An important feature of EGG is its capability to optimize general graph structures directly instead of encoding the structures into indirect representations, such as bit strings and trees. The potential of the proposed approach is demonstrated through the experimental design of MOS current mirrors. © Springer-Verlag 2004.