Copper (Cu) has higher conductivity and resistance to electromigration (EM) than aluminum (Al) and has been the choice of the semiconductor industry for interconnecting metal in sub-100 nm devices. With rapidly decreasing feature sizes and more demand for circuit speed, low-K and passivation materials have been inserted with Cu-interconnects to address the additional RC delay reduction [1--2]. Unfortunately, as the thickness of the gate oxide becomes very thin because of the scaling down of channel length, quantum mechanical tunneling occurs for voltages below the Si/SiO2 barrier height which is approximately 3.1 eV [3--4] (Fig. 2.1).Fig. 2.1The effect of gate oxide on channel length and its consequences on the oxide-tunneling limit (Reprinted with permission, IBM Research [3])
CITATION STYLE
Gupta, T. (2009). Dielectric Materials. In Copper Interconnect Technology (pp. 67–110). Springer New York. https://doi.org/10.1007/978-1-4419-0076-0_2
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