In this paper we present a networked lightweight and partially reconfigurable platform assisted by a remote bitstreams server. We propose a software and hardware architecture as well as a new data-link level network protocol implementation dedicated to dynamic and partial reconfiguration of FPGAs. It requires a network controller and much less external memories to store reconfiguration software, bitstreams and buffer pools used by standard communication protocols. Our measures, based on a real implementation, show that our system can download remote bistreams with a reconfiguration speed ten times faster than known solutions. © 2008 Springer-Verlag Berlin Heidelberg.
CITATION STYLE
Bomel, P., Gogniat, G., & Diguet, J. P. (2008). A networked, lightweight and partially reconfigurable platform. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4943 LNCS, pp. 318–323). https://doi.org/10.1007/978-3-540-78610-8_35
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