Deterministic restrictions in circuit complexity

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Abstract

We study the complexity of computing Boolean functions using AND, OR and NOT gates. We show that a circuit of depth d with S gates can be made to output a constant by setting O(51-∈(d)) (where ∈(d) = 4-d) of its input values. This implies a superlinear size lower bound for a large class of functions. Using this, we obtain a function computable by a uniform family of constant depth polynomial size circuits that cannot be computed by constant depth circuits of linear size. We give circuit constructions that show that the bound O(S1-∈(d)) is near optimal. We also study the complexity of computing threshold functions. The function Tnbr has the value 1 iff at least r of its inputs have the value 1. We show that a circuit computing Tn has at least Ω(r2(log n)/log r) gates, for r

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APA

Chaudhuri, S., & Radhakrishnan, J. (1996). Deterministic restrictions in circuit complexity. In Proceedings of the Annual ACM Symposium on Theory of Computing (Vol. Part F129452, pp. 30–36). Association for Computing Machinery. https://doi.org/10.1145/237814.237824

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