The Hardware Design Prospective of Object Detection by Using Background Subtraction Techniques: An Analytical Review

Abstract

Speed and precision are two important metrics which plays crucial role in real-time video processing systems. Detection of objects is a fundamental process of an intelligent video processing system. Due to increased price and complications of serial implementation of general purpose processors, it does not lead to a good choice for real-time surveillance system. The parallel processing capability and flexibility of field programmable gate array (FPGA) are a big advantage in this field. The aim of this paper is to present the hardware design prospective of object detection by using background subtraction techniques implemented on FPGA which can be used in a video processing system.