Virus detection at the router level is rapidly gaining in importance. Hardware-based implementations have the advantage of speed and hence can support a large throughput. In this paper we describe an FPGA-based implementation of the Bloom filter virus detection code that is compiled from the native C to VHDL and mapped onto a Virtex XC2V8000 FPGA. Our results show that a single engine tailored for handling virus signatures of length eight bytes can achieve a throughput of 18.6 Gbps while occupying only 8% of the FPGA area. © Springer-Verlag Berlin Heidelberg 2006.
CITATION STYLE
Suresh, D. C., Guo, Z., Buyukkurt, B., & Najjar, W. A. (2006). Automatic compilation framework for bloom filter based intrusion detection. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 3985 LNCS, pp. 413–418). Springer Verlag. https://doi.org/10.1007/11802839_49
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