CODACS project: A demand-data driven reconfigurable architecture

Abstract

This paper presents CODACS (COnfigurableDAtaflowComputing System) architecture, a high performance reconfigurable computing system prototype with a highly scalable degree able to directly execute in hardware dataflow processes (dataflow graphs). The reconfigurable environment consists of a set of FPGA based platform-processors created by a set of identical Multi Purpose Functional Units (MPFUs) and a reconfigurable interconnect to allow a straightforward one-to-one mapping between dataflow actors and MPFUs. Since CODACS does not support the conventional processor cycle, the platform-processor computation is completely asynchronous according to the dataflow graph execution paradigm proposed in [8].