The unified hardware design for GCM and SGCM

Abstract

Authenticated Encryption (AE) schemes are an important security tool. Especially, GCM has been widely adopted on account of its performance and efficiency and used widely. As GCM has some weaknesses, SGCM has been proposed in 2011 and both AE schemes sometimes are used in the same system or hardware architecture. In this paper, we present the novel unified hardware for GCM and SGCM. Both modes are readily integrated into single architecture with little modification. The main contributions are three folded. Firstly, we unified GCM and SGCM using dual field adder. Secondly, we improved the previous dual field multiplier to fit our architecture. Our dual field multiplier just needs half cycles of referred one. For quantitative analysis, we calculate areas except for LEA core and add areas of AES which was used by each of previous works. We expect to achieve 29% or 35% less size than previous one. Lastly, we applied LEA instead of AES for the compact hardware implementation. Our unified hardware for GCM and SGCM is implemented within 16,133 GE and achieves 0.5 Gbps on 500 Mhz. Our unified hardware using LEA has 48% less size than the one using AES.